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If this field is supported, bit 1 of word 53 shall be set to one. The value in word 66 shall not be less than the
value in word 65. This field shall be supported by all Drives supporting DMA modes 1 and above. If bit 1 of word
53 is set to one, but this field is not supported, the Drive shall return a value of zero in this field.
6.7.22 Word 67: Minimum PIO transfer cycle time without flow control
Word 67 of the parameter information of the Identify Device command is defined as the minimum PIO transfer
without flow control cycle time. This field defines, in nanoseconds, the minimum cycle time that, if used by the
host, the Drive guarantees data integrity during the transfer without utilization of flow control.
If this field is supported, Bit 1 of word 53 shall be set to one.
Any Drive that supports PIO mode 3 or above shall support this field, and the value in word 67 shall not be less
than the value reported in word 68.
If bit 1 of word 53 is set to one because a Drive supports a field in words 64-70 other than this field and the
Drive does not support this field, the Drive shall return a value of zero in this field.
6.7.23 Word 68: Minimum PIO transfer cycle time with IORDY
Word 68 of the parameter information of the Identify Device command is defined as the minimum PIO transfer
with IORDY flow control cycle time. This field defines, in nanoseconds, the minimum cycle time that the Drive
supports while performing data transfers while utilizing IORDY flow control.
If this field is supported, Bit 1 of word 53 shall be set to one.
Any Drive that supports PIO mode 3 or above shall support this field, and the value in word 68 shall be the
fastest defined PIO mode supported by the Drive.
If bit 1 of word 53 is set to one because a Drive supports a field in words 64-70 other than this field and the
Drive does not support this field, the Drive shall return a value of zero in this field.
6.7.24 Word 69: CFast Specification
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Bit 15 is set to ‘1’ to indicate that CFast specification is supported.
6.7.25 Word 75: Queue depth for NCQ
Bit 15:5 Reserved
Bit 4:0 Maximum queue depth -1
6.7.26 Word 76: Serial ATA Capabilities
Bit 15:11 Reserved
Bit 10 1 = Supports Phy Event Counters
Bit 9 1 = Supports receipt of host initiated power management requests
Bit 8 1 = Supports native Command Queuing
Bit 7:3 Reserved for future SATA signaling speed grades
Bit 2 1 = Supports SATA Gen2 Signaling Speed (3.0Gb/s)
Bit 1 1 = Supports SATA Gen1 Signaling Speed (1.5Gb/s)
Bit 0 Shall be cleared to zero
6.7.27 Word 78: SATA Feature support
Bit 15-7 Reserved
Bit 6 1 = Supports software settings preservation
Bit 5 1 = Supports asynchronous notification
Bit 4 1 = Supports in-order data delivery
Bit 3 1 = Device supports initiating interface power management
Bit 2 1 = Supports DMA Setup Auto-Activate optimization
Bit 1 1 = Supports non-zero buffer offsets
Bit 0 Shall be cleared to zero
6.7.28 Word 79: SATA Features enabled
Bit 15-7 Reserved
Bit 6 1 = Supports software settings preservation enabled
Bit 5 1 = Supports asynchronous notification enabled
Bit 4 1 = Supports in-order data delivery enabled
Bit 3 1 = Device supports initiating interface power management enabled
Bit 2 1 = Supports DMA Setup Auto-Activate optimization enabled
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 0.92
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
F-240_data_sheet_CA-HxBV_Rev092.doc
Page 22 of 56
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